Table of Contents
Lun Liu (刘仑)
I am an undergraduate student majoring in Software Engineering at Shanghai Jiao Tong University. I am also a member of the Institute of Parallel and Distributed Systems (IPADS). Here is my cv.
- Performance and Reliability of Computer Systems
- Programming Model and Runtime for Multicore and Distributed Systems
Recovering Parallelism for Transactional Lock Elision with LockEnd Algorithm, Supervised by Prof. Haibo Chen
While current best-effort hardware transactional memory (BEHTM) could provide scalable performance transparently, a transition from HTM to lock-based version may severely hurt performance scalability, due to the fact that a lock-based fallback handler will unconditionally abort all in-flight transactional execution. We tuned the retry policies and proposed a new approach to allow safe concurrency between the lock-based fallback handler and transactional code, by moving checking of lock status to the end of transactional code. We also proved the correctness of that method and showed that our optimizations can improve the scalability of Stanford Transactional Applications for Multi-Processing (STAMP) benchmarks significantly.
Modern enterprise networks are complicated and hard to configure correctly. People have come up with tools such as static analyzers of network configurations to automatically detect network configurations errors. However, these tools usually take significant time to run. I carried out a series of historical analyses of network configurations to see how real networks evolve overtime and how some static analyzer meet the requirements of real-world networks. This project also categorized the most common changes for network configurations, trying to cast some light on how to improve the existing analyzer.
2014 Computer Architecture
A Simulation of cache replacement policy using PIN.
2014 Distributed Systems
Implemented reliable data transport (RDT) protocol, DSDV routing protocol, a MapReduce library and a fault-tolerant key/value service using a form of primary/backup replication in GO.
2014 Digital Logic Design of Computer Components
Implemented single cycle and pipelined cpu in Verilog.
2013 Introduction to Human Computer Interaction
Implemented an app that can encode text into high frequency sound wave and combine it with music, and record and decode the combined music into text again.
2013 Operating Systems
Implemented booting, memory management, user environments and preemptive multitasking of an exokernel-like system (JOS).
2013 Principle and Technology of Compiler
Simplified C language and implemented a compiler to compile that language into AT\&T assembly.
2013 Practice of Software Development
A Windows phone app for carpooling.
2012 Computer System Engineering
Implemented a Frangipani-like distributed file system with lock and cache support (YFS).
2012 Principle and Technology of Database
A simple online library using SQL database.
2012 Introduction to Computer Systems
CSAPP labs: bits operations, binary bombs, buffer overflow, Y86 simulator, Y86 assembler, memory allocator, pipeline processor optimizations, cache related optimizations and shell.
Awards and Honors
- Oct, 2014. IBM Outstanding Student Scholarship (top 5%)
- Feb, 2014. UCLA CSST Scholarship (for summer intern, 92 students in total in all disciplines from China and Japan)
- Oct, 2013. Shanghai Jiao Tong University Xin Dong Scholarship, the First Prize (top 5%)
- Oct, 2012. National Scholarship of China (top 2%)
I am a member of Network Information Management Organization (NIMO) which helps maintaining the campus network, and I became a core member in 2013.
I love basketball in all ways: watching, playing, etc. I even got a certificate as level III national basketball referee in China.
Oh, and during my summer intern at UCLA, I was awarded as the Cool Girl for UCLA CSST 2014. Just check out my profile picture again!